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[Other resourceDPRAM

Description: 网络控制器和链路控制器的CPU即是通过读写双端口RAM芯片完成网络层与数据链路层的原语交互。mailbox中写入的是原语的类型,而双端口RAM的其它存储空间则存放各种服务原语的参数。-network controller and the CPU controller link is through reading and writing dual-port RAM chip to complete the network layer and data link layer of the original language interaction. Mailbox inclusion of the original language is the type of dual-port RAM and the other storage space incorporating various services parameters of the original language.
Platform: | Size: 1291 | Author: 李历 | Hits:

[USB developfirm_usb

Description: DSP通过双口RAM和ISP1581实现下位机的USB固件程序,调试通过,上位机驱动和读写例程,如果下载多的话再传-DSP through dual-port RAM and ISP 1581 to achieve lower computer's USB firmware and Debugging, PC drivers and routines to read and write, if you download are so tame
Platform: | Size: 221149 | Author: 曾先生 | Hits:

[Otherallidt_20020616.tar

Description: idt的双口ram的读写接口程序,verilog 代码,并且有测试文档-Employing a dual-port ram reader interface program, Verilog code, and a test document
Platform: | Size: 44740 | Author: buttern | Hits:

[Other resourcedpram_fpga

Description: 这是我用vhdl语言,在fpga内部做了一个双口ram的程序。我的邮箱:wleechina@163.com-This is the language I used vhdl in fpga done an internal dual-port ram procedures. My mail : wleechina@163.com
Platform: | Size: 2831822 | Author: 李伟 | Hits:

[Other resourcemy_ramlib_06

Description: 包括各种类型存储器的VHDL描述,如FIFO,双口RAM等 -including various types of memory VHDL description, such as FIFO, Dual Port RAM, etc.
Platform: | Size: 616055 | Author: ruan | Hits:

[Other resourcevhdl_ad0809_arm

Description: 本程序是用VHDL语言写的,包括AD0809,双口RAM等程序。已经调试过-this program is written in VHDL, including the AD0809, dual-port RAM, and other procedures. Debugging has been too
Platform: | Size: 4367 | Author: lm | Hits:

[VHDL-FPGA-Verilogram_dp_sr_sw

Description: dual ram port in verilog
Platform: | Size: 1024 | Author: sayhaa | Hits:

[Other Embeded programARM-read-FPGA-data1.7

Description: ARM读取从FPGA双口RAM读取AD采样1.7-ARM FPGA dual-port RAM read to read from the AD sample 1.7
Platform: | Size: 1360896 | Author: 张鹏 | Hits:

[VHDL-FPGA-Verilogequivalent_sample

Description: 基于FPGA的等效采样系统设计,包含状态机设计,双口ram使用方法,分频设计等-FPGA-based equivalent sampling system design, including the state machine design, dual-port ram usage, frequency design
Platform: | Size: 2925568 | Author: 陈燕凯 | Hits:

[MiddleWareDualPortRam

Description: A systemc implementation of dual port ram module. A vcd file as the sample result is also included. There is a generator for reading/writing data from/to the two ports of the RAM, the tracing of which is offered using the sc_trace API.
Platform: | Size: 7168 | Author: 鲁克文 | Hits:

[VHDL-FPGA-VerilogDU-RAM

Description: 本程序是一个双口RAM的读写程序,在很多工程中,特别是存储器中运用广泛-This program is a dual-port RAM read and write procedures, in many projects, especially the extensive use of memory
Platform: | Size: 15360 | Author: jiankang | Hits:

[VHDL-FPGA-Verilogram

Description: 利用verilog实现的双口RAM。文件包含工程文件,仿真文件,使用方便。-Using verilog implementation of dual-port RAM. File contains the project files, simulation files, easy to use.
Platform: | Size: 219136 | Author: sue | Hits:

[VHDL-FPGA-Verilogdppramm

Description: 基于fpga的双口ram的设计与实现,好东西,希望大家喜欢-The dual-port ram fpga based design and implementation of good things, hope you like
Platform: | Size: 1924096 | Author: | Hits:

[VHDL-FPGA-VerilogPort-RAMs

Description: 介绍双口ram功能,进一步了解在fpga上怎么设计一个双口ram-Introduced the dual-port ram function to learn more about the fpga on how to design a dual port ram
Platform: | Size: 352256 | Author: 吴越强 | Hits:

[Program docram

Description: 此文档为fpga控制双口RAM的开发文档,讲解很细,易于上手.双口RAM是在1个SRAM存储器上具有两套完全独立的数据线、地址线和读写控制线,并允许两个独立的系统同时对其进行随机性访问的存储器,即共享式多端口存储器。-This document is controlled dual-port RAM fpga development documents, explain very small, easy to use. Dual-port RAM is an SRAM memory has two completely separate data lines, address lines and control lines to read and write, and allows two independent system while its random access memory, multi-port memory that is shared.
Platform: | Size: 210944 | Author: uodsi | Hits:

[VHDL-FPGA-Verilogram

Description: 练习调用双口ram,fpga自产生65536个递增数,6.25Hz输出,在20ms内读出。-Exercises called dual port ram, fpga increasing number of self-produced 65536, 6.25Hz output within 20ms readout.
Platform: | Size: 2059264 | Author: 王王 | Hits:

[VHDL-FPGA-VerilogRAM

Description: Nios ii双口ram,用于MCU通过nios ii进行双口ram通信,verilog格式.-Nios II dual port RAM, for MCU dual port RAM communication, through the Nios II Verilog format.
Platform: | Size: 2048 | Author: 刘泽 | Hits:

[VHDL-FPGA-VerilogDULE-RAM

Description: 基于VERILOG的双口ram例子,比较简单,不是很复杂,入门了解就可以了。-Based on dual port ram VERILOG example, the relatively simple, not very complicated, entry understand it.
Platform: | Size: 101376 | Author: 张是非 | Hits:

[source in ebookDual-RAM

Description: DSP EMIF双口RAM和FPGA实现高速通信-DSP EMIF dual-port RAM and FPGA to achieve high-speed communications
Platform: | Size: 573440 | Author: lerning dog | Hits:

[Documents基于Actel-FPGA-的双端口RAM-设计

Description: 基于Actel-FPGA-的双端口RAM-设计(Base Actel-FPGA-Dual Port Ram design)
Platform: | Size: 270336 | Author: lysir | Hits:
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